Commit Graph
9 Commits
Author SHA1 Message Date
weichen b2fa5be60f Add deterministic slot constraints with labels and questions
Details (original message):
Add deterministic slot constraints with labels and questions, and the planner-facing capability catalog.
2026-09-29 16:32:50 +00:00
weichen 8f9496d5d8 Record the orchestration capability-catalog design: intent specs as the planner-facing catalog
Details (original message):
Record the orchestration capability-catalog design: intent specs as the planner-facing catalog.
2026-09-29 16:24:59 +00:00
weichen 345c1fdf24 Record the scope boundaries for compound instructions, slot states, and multi-turn dialog
Details (original message):
Record the scope boundaries for compound instructions, slot states, and multi-turn dialog.
2026-09-29 16:17:03 +00:00
weichen 65d0df473a Record the cross-repo integration test report for the Squad gate and Native decorator
Details (original message):
Record the cross-repo integration test report for the Squad gate and Native decorator.
2026-09-29 16:06:13 +00:00
weichen bb2bed2240 Pin error-code-system to dbeed2f for squad.intent_refused. 2026-09-29 15:56:57 +00:00
weichen c3f1ae9209 Correct the positioning: an attachable capability
Details (original message):
Correct the positioning: an attachable capability, never an Agent-System replacement; make Native attachable via an optional decorator.
2026-09-29 15:52:51 +00:00
weichen b06715d80b Record the decoupling tiers and LLM layering design for the Agent-Squad adoption
Details (original message):
Record the decoupling tiers and LLM layering design for the Agent-Squad adoption.
2026-09-29 15:45:37 +00:00
weichen b58595fb38 Implement the intent core
Details (original message):
Implement the intent core, conformance suite, catalog alignment, examples, and the intentctl diagnostics CLI.
2026-09-29 15:35:18 +00:00
weichen b450b03638 Initialize the repository with pinned submodules, project entry documents, and the design record
Details (original message):
Initialize the repository with pinned submodules, project entry documents, and the design record.
2026-09-29 15:20:38 +00:00